Printable 1-page Program

visit http://www.eda.org/edps for more information

of Silicon Valley

 19th Annual

Electronic Design Process Symposium

April 5 & 6, 2012

Monterey Beach Hotel, Monterey, CA

The Electronic Design Processes Symposium (EDPS) provides a forum for a cross-section of the design community to discuss state-of-the-art electronic design processes and CAD methodologies. The workshop focuses on the improvement of the overall design process, rather than on the functions of the individual tools themselves. Visit www.eda.org/edps.

Corporate Sponsors:  Cadence • Synopsys • Mentor • Altera

Keynote Speakers:

• Mike Hutton, Principle Investigator, Office of the CTO, Altera
• Jim Hogan, Managing Partner, Vista Ventures
• Riko Radojcic, Dir. of Engineering, Qualcomm

Session Themes:
   (by Altera, Intel, AMD, ARM, Qualcomm, Broadcom, TSMC, Synopsys, Mentor, Cadence...)

• Top 5 EDA Problems
• EDA in the Cloud
• Low-Power with Performance
• 3D-IC Design Flow (Session)
• 3D-IC Design Flow (Panel)

On site Registration available April 5 & 6 - bring a check (no credit cards).

• Registration includes a copy of the workshop notes, continental breakfast on both days, lunch both days, and the EDP banquet dinner.
• You may bring a guest to the Banquet Dinner for $50.00. If you do, please pay when you first check into the meeting.

Important Web Sites:

www.eda.org/edps
www.montereybeachresort.com

Program Detail: (Printable 1-page PDF)

Announcement: (PDF emailer or for print)